When dealing with rechargeable batteries, one faces two voltage limits: over-charge limit, over-discharge limit. When it comes to charging, most battery charging ICs out in the market will deal with it and frankly, I haven’t yet ran into a situation where I need to delicately control the voltage limit when the charging should stop. The battery charging ICs has a few variants when it comes to overcharge limits: 4V, 4.1V, 4.2V are some examples that I’ve seen in the datasheets.
However, when it comes to over-discharge protection the limits are set very low: 2.7V or 3V. Even these protections are only supported in not just “battery charging” chips but in “battery management” chips which tend to be much more expensive. However, what if you want to cut off battery power when the battery voltage gets lower than a voltage limit that is higher than the over-discharge cut-off voltage supported by the battery management chips?
For my situation, I needed to cutoff the battery power when it became lower than 3.5V. I have found a white paper from LT which describes a circuit that does the trick. This article really helps you understand how the circuit works and what was so awesome about this was that it also introduced a hysterisis to counter the voltage recovery that occurs when the battery is release from the load. Based on this, I have made my own ‘battery over-discharge protection’ circuit (bodp circuit for short) that is designed to cutoff battery from load when the battery voltage hits 3.5V.
Mind you, this circuit not only includes just the bodp circuit but also a cheap battery charging IC (located on the left top corner). You don’t have to care about this battery charging circuit.
My bodp circuit looks exactly like the example circuit shown in the LT article but with a few differences. First off, I have used different parts compared to the article due to cost.
|SHUNT VOLTAGE REGULATOR||LT1389||MAX6006|
You can use other chips too but please note that this is a bodp circuit, and after it cuts battery power it is critical to make sure that the bodp circuit itself will not drain significant amount of power. If not, the battery will drain quite fast to a state where it will be over-discharged and render itself unrecoverable. That is why when choosing alternatives, I not only tried to consider cost but also its bias current specifications. My alternatives will drain more current than the parts used in the LT article but still the level is manageable.
One more addition that I made is the buffer IC. I have gone through three iterations with this bodp circuit and found that the op-amp output which is intended to turn off the battery power on/off transistor(the huge PMOS, ‘BSP233P’) doesn’t switch clearly in real life. I’ll show you what I mean later in this post after I explain how I measured all this.
Now that we have the circuit schematic, its time to see if this thing really works. All that needs to be done is to get any LiPo battery well charged above the cut-off voltage(in this case, 3.5V) and a load that will drain power from this circuit.
Here is the setup. I used arduino UNO’s analog input to check the voltage nodes of interest in the bodp circuit. The nodes that will be measured are named: VBAT, VLOAD, PMOS_G, COMP_P. These nodes are marked in the schematic image below:
To give you a brief explanation:
- VBAT: where battery’s positive terminal will be connected.
- VLOAD: where the load will be attached. If the bodp doesn’t cut off the battery power, this node’s voltage should have a value very close to VBAT. If the bodp cuts off, VLOAD should be zero, theoretically.
- COMP_P: named like this because this node is the positive node of the op-amp. If you read the LT article, you will understand the role of this node but to explain it here again, this node is the detection value. When COMP_N node’s voltage decreases in time and reaches the same value with COMP_P, bodp will cut-off battery power. After doing so, the hysterisis introduced with R5 will bump up the COMP_P value a little bit. To get a more elaborate explanation, check out the LT article.
- PMOS_G: If you know how PMOS works, then simple: when gate of PMOS is low, the PMOS will allow current to flow through it thus allowing battery power to be supplied to the load. On the other case where the gate of PMOS is high, it will not be conductive and prevent battery power to reach the load. In the original design in the LT article, the gate of the PMOS was directly connected to the output of op-amp. However, in my design I’ve put a buffer IC between these two. The reason behind this will be explained later on.
As for the load, I wanted to drain the battery power in somewhere around 0.5C and made a parallel array of resistors that I had to get the low resistance that will achieved this amount of drain current.
BTW, one important thing to do with the arduino UNO was to power it with the 12V DC power. I tried just powering it with usb power but for some reason, the reference voltage of the arduino was not 5V but something lower. I’m not sure about the reason behind this erratic behavior but since I wrote my arduino sketch code assuming that the analog reference voltage is 5V, I just powered the arduino with a 12V DC just to make sure.
With my simple arduino sketch code(shared in github), the voltage values of the four nodes of interest will be transmitted to the host in UART every 10 seconds. Naturally, the host PC should be able to log these values. How to log these data is totally up to the user and for me, I just whipped up a simple python code(shared in github) in Windows 10 that will receive the UART strings and save them in a file.
Now, the battery will drain eventually but it will take some time. I’m sure everyone has better things to do, so all you have to do after setting this up is to let it drain and go do something productive for a few hours. As for me, I’ve drained a 430mAh LiPo battery with 200~300mA (my memory may not be so accurate) and came back to check in 3~4 hours. After a while, you’ll see that the bodp has cut-off battery power. At that point, quit the python code that has been logging the data, open the log file and copy&paste all the data in Excel (or spreadsheet if you prefer). From here, you can easily use the graph you data. The graph below is what happened to in my bodp circuit:
here are a few key points about this graph:
– when VBAT(blue) reaches 3.5V, the cut-off occurs
– VLOAD voltage is a little lower than VBAT. This is due to the on-resistance of the PMOS. If you want to eliminate this as much as possible, you should find a PMOS that can not only withstand the supply current but also very low on-resistance.
– COMP_P(yellow) bumps up when cut-off occurs
– PMOS_G(grey) goes from low to high in one clear shot. The buffer IC is what makes this possible. You’ll see why this is so beautiful is in a moment.
Now, I’ve been telling for a few times that the buffer IC between the gate of PMOS and the output of op-amp is an important addition to the original circuit. I’ll show you the graph when there is no buffer IC:
Whoaaa… you can see what the problem is at first sight! The PMOS_G(grey) is low at first, but it doesn’t go high at once. Instead, it stays in a mid-value for a while and then goes high. Because of this, the cut-off is not sharply done and instead the VLOAD remains at a much lower value compared to VBAT for a while and then goes to zero. This is unreliable behavior and is not desirable. Now, you know why adding a buffer IC is good for the overall design.
I’m not sure if others use or need this kind of bodp circuit where the user can control the cut-off voltage but if you are, I hope this post has been at least the slightest bit of help. Cheers!